Personal computer systems in general and IBM personal computers in particular have attained widespread use for providing computer power to many segments of today's modern society. Personal computer systems can usually be defined as a desk top, floor standing, or portable microcomputer that consists of a system unit having a single system processor and associated volatile and non-volatile memory, a display monitor, a keyboard, one or more diskette drives, a fixed disk storage, and an optional printer. One of the distinguishing characteristics of these systems is the use of a motherboard or system planar to electrically connect these components together. These systems are designed primarily to give independent computing power to a single user and are inexpensively priced for purchase by individuals or small businesses. Examples of such personal computer systems are IBM's PERSONAL COMPUTER AT and IBM's PERSONAL SYSTEM/2 Models 25, 30, L40SX, 50, 55, 56, 57, 65, 70, 80, 90 and 95.
These systems can be classified into two general families. The first family, usually referred to as Family I Models, predominantly use an I/O bus architecture exemplified by the IBM PERSONAL COMPUTER AT and other "IBM compatible" machines. This bus architecture is ref erred to in this description as the "AT bus" and is also known as the "Industry Standard Architecture" or "ISA". This bus architecture is generally known, having been described both in technical manuals available from IBM and in more popularized texts such as The Winn Rosch Hardware Bible (Brady, N.Y., 1989). The interested reader is referred to those texts for further detailed information about this bus architecture. Many Family I models have used the popular Intel 8088 or 8086 microprocessor as the system processor. These processors have the ability to address one megabyte of memory. More recently, some Family I models have used high speed microprocessors of the 80286, 80386 or 80486 types.
As personal computer technology has developed and moved from eight to sixteen and eventually thirty two bit wide bus interaction and higher speed microprocessors, performance capability has been sought by separating the architecture of the personal computer into varying bus areas. More specifically, in the original IBM PC, what came to be known as the expansion bus was essentially a direct extension of the microprocessor connections, buffered and demultiplexed as required. Later, as the AT bus specification was developed and came into wide use, it became possible to sever the nearly direct connection between the microprocessor and the bus, giving rise to the presence of what became known as the local processor bus and the renaming of the expansion bus as the input/output (or I/O) bus. Typically, in order to enhance performance, the local processor bus runs at a higher clock speed (typically expressed in Hertz) than does the input/output bus. The IBM AT architecture also opened the possibility of running more than one microprocessor on the input/output bus, through use of direct memory access (DMA) interrupts.
The second family, referred to as Family II Models, use IBM's MICRO CHANNEL bus architecture exemplified by IBM's PERSONAL SYSTEM/2 Models 50 through 95. The Family II models typically use the high speed INTEL 80286, 80386, and 80486 microprocessors which can operate in a real mode to emulate the slower speed INTEL 8086 microprocessor or a protected mode which extends the addressing range from 1 megabyte to 4 Gigabytes for some models. In essence, the real mode feature of the 80286, 80386, and 80486 processors provide hardware compatibility with software written for the 8086 and 8088 microprocessors. The Family II personal computers are of little significance with regard to the present invention, except as an illustration of the use of higher capability microprocessors. Such microprocessors have also found their way into use in AT bus architecture personal computers (as mentioned above), notwithstanding what may be some technical limitations on the effectiveness of those processors due to a more limiting bus architecture.
The AT bus is designed with three different busses in the system. These are the local processor bus, where the system processor or CPU, any numeric co-processor provided, and a processor support chip reside; the I/O or option bus (also known as the AT bus) where adapter cards reside; and a bus here known as the XD bus (also known as the planar I/O bus) which is between the local processor and AT busses and on which certain standard I/O device controllers reside.
The characteristics of the three busses differ one from another. Partly as a consequence and partly due to increasing speeds of operation as enhanced performance is sought, crosstalk and transmission line noise on the AT bus becomes problematical. When such noise appears with a command signal such as an Input/output Read (-IOR) command, flags may be inadvertently reset or data completely lost. When such noise appears with a command signal such as an Input/Output Write (-IOW) command, incorrect data may be written.
Generally, commands on the AT bus are decoded by simple combinational logic. Thus, crosstalk and transmission line noise on I/O inputs are seen as short, false transitions and result in short, false commands being decoded. These commands can result in data integrity problems.